EIS at different states of charge with INTELLO

Significance of the topic

Electrochemical impedance spectroscopy (EIS) performed at varying battery states of charge (SOC) offers deep insight into internal resistance changes during charge and discharge. This approach supports the optimization of electrode materials, diagnostic tracking of aging mechanisms, and reliable estimation of state of health (SOH), all of which are critical for extending battery lifetime and ensuring performance in applications ranging from portable electronics to electric vehicles.

Objectives and study overview

This study demonstrates a stepwise procedure using INTELLO software to acquire EIS data at defined SOC intervals on a lithium‐ion coin cell. The primary goals are to characterize impedance evolution during discharge and charge sequences, to fit the data with an equivalent circuit in NOVA, and to quantify the variations in key circuit elements as SOC changes.

Methodology and instrumentation

A Li‐ion 2450 coin cell (120 mAh) was used, mounted in an Autolab Duo Coin‐cell holder with four‐point contacts. INTELLO orchestrates automated loops of charge or discharge pulses, rest periods to reach steady‐state voltages, and subsequent galvanostatic EIS scans. Measurement parameters included a 1 C rate, 6 min charge/discharge steps (≈10 % SOC per step), rest intervals, a perturbation amplitude corresponding to 0.01–0.05 C, and a 100 kHz–0.1 Hz frequency window. NOVA software conducted circuit fitting using a model comprising an inductor, series resistance, three parallel R–CPE branches, and a Warburg element.

Main results and discussion

Nyquist plots revealed three overlapping semicircles in the mid‐frequency range and a low‐frequency tail. As SOC decreased from 100 % to 10 %, only the lowest‐frequency semicircle expanded markedly, indicating a rise in cathodic charge‐transfer resistance. Bode plots corroborated this single dominant change. Fitted parameters showed:

• Ohmic resistance (Rs) increased from 0.059 Ω to 0.065 Ω.
• Primary charge‐transfer resistance (Rp1) rose from 0.23 Ω to 0.89 Ω.
• The associated CPE parameter Y01 grew from 0.19 Ω−1 to 0.24 Ω−1.

Other resistances and capacitances remained essentially constant, highlighting the selective sensitivity of the low‐frequency process to lithium insertion at the cathode.

Benefits and practical applications

• Non‐destructive monitoring of internal cell behavior across SOC.
• Quantitative evaluation of SOH and identification of aging pathways.
• Guidance for material and cell design to improve cycle life.
• Implementation in quality control and development of advanced battery systems.

Future trends and potential applications

Advances in frequency‐range extension (up to 10 MHz) will enable characterization of emerging solid‐state batteries. Integration of distribution of relaxation times (DRT) analysis promises clearer deconvolution of overlapping processes. Automated high‐throughput protocols and AI‐driven fitting routines will accelerate battery diagnostics and optimize performance in real‐world conditions.

Conclusion

EIS at multiple SOC levels, combined with robust equivalent‐circuit modeling, provides a detailed picture of the evolving resistive and capacitive elements within a battery. This methodology supports both fundamental research and applied diagnostics, contributing to enhanced battery management and design.

Instrumentation

• Autolab VIONIC potentiostat/galvanostat equipped with INTELLO software.
• Autolab Duo Coin‐cell holder (4‐point contact).
• NOVA software for EIS data fitting and simulation.

References

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